1. Field of the Invention
The present invention relates to a method for heat treatment of a silicon wafer, and more particularly, it relates to a method for heat treatment of a silicon wafer that can reduce COP density, and at the same time, decrease microroughness and haze of the silicon wafer surface.
2. Description of the Related Art
In order to improve electric characteristics of silicon wafers such as oxide dielectric breakdown voltage, it is necessary to obtain a wafer surface layer on which devices are fabricated as a defect-free layer. In the surface layer of silicon wafer, there are usually crystal defects having a regular octahedral structure, which are introduced during the crystal growth. These defects are called COP (crystal originated particle), and may be a cause of the degradation of electric characteristics.
For improving the oxide dielectric breakdown voltage, it has been reported that it is effective to subject a silicon wafer to hydrogen annealing, i.e., a heat treatment at a high temperature under hydrogen gas atmosphere for several hours (for example, Japanese Patent Publication (KOKOKU) No. 5-18254, Japanese Patent Application Laid-open (KOKAI) No. 6-295912).
There has also been proposed a method for heat treatment utilizing an apparatus for rapid heating and rapid cooling (rapid thermal annealer, occasionally abbreviated as "RTA" apparatus hereinafter) for improvement of the heat treatment such as shortening of heat treatment time. For example, as disclosed in Japanese Patent Application Laid-open (KOKAI) No. 7-161707, there has been proposed a heat treatment within a relatively low temperature range of 950-1200.degree. C. for a short period of time such as 1-60 seconds for improving the oxide dielectric breakdown voltage.
However, according to the aforementioned prior art method of Japanese Patent Application Laid-open (KOKAI) No. 7-161707, the condition for the heat treatment is defined in view of the oxide dielectric breakdown voltage, and COPs on the wafer surface, which directly affect on the electric characteristics of devices, are not considered at all, though BMD (bulk micro defect) density has been considered in the working examples thereof.
Further, the experiments conducted by the inventors of the present invention revealed that the heat treatment of the aforementioned prior art did not sufficiently improve COP, though it improved the oxide dielectric breakdown voltage to some extent. Therefore, the method did not afford sufficient improvements of electric characteristics except for the oxide dielectric breakdown voltage. That is, when a silicon wafer was subjected to a hydrogen heat treatment, for example, at 1050.degree. C. for 30 seconds, which is within the range defined by the aforementioned prior art method, COPs might not be reduced, and on the contrary, the surface roughness, i.e., haze, might be degraded due to etching effect of hydrogen. Further, even when the heat treatment was performed at 1100.degree. C., the reduction of COPs was still insufficient like the above case. That is, it was found that sufficient improvement of COP could not be obtained by the conditions of the heat treatment according to the prior art.
Therefore, the inventors of the present invention previously suggested a method for heat treatment of a silicon wafer in a reducing atmosphere utilizing an RTA apparatus in Japanese Patent Application No. 10-82606, which can specifically reduce COP density on the silicon wafer surface.
In this method, a silicon wafer is heat-treated at a temperature in the range of 1200.degree. C. to the melting point of silicon in a reducing atmosphere for 1-60 seconds. It is described that the reducing atmosphere is preferably composed of 100% of hydrogen or a mixed atmosphere of hydrogen and argon, and the heat treatment time is preferably 1-30 seconds.
This method was found to be able to markedly reduce COP density on the silicon wafer surface, and also markedly improve the electric characteristics, i.e., the oxide dielectric breakdown voltage (time zero dielectric breakdown, TZDB) and the time dependent dielectric breakdown characteristic (TDDB).
On the other hand, with the recent use of higher integration degree of MOS structure transistors, it has become necessary to improve the mobility of carriers (electrons and holes) immediately under the oxide layer in the MOS structure. Further, with the use of increasingly higher driving frequency of CPU (central processing unit), higher writing and reading velocities of memories are of course required, and therefore improvement of the carrier mobility has become an important research subject.
Further, it has become clear that microroughness of wafer surface is closely related to performance and reliability of devices as factors greatly affecting the electric characteristics such as the oxide dielectric breakdown voltage and the mobility of carriers (see Shinya Yamakawa et. al., J. Appl. Phys. 79, 911, 1996).
As a method for reducing the microroughness of wafer surface, there has been known, for example, a method which comprises applying an electric current to the wafer surface using a special apparatus such as an ultra high vacuum apparatus (see Ando et al., Extended Abstracts (The 56th Autumn Meeting, 1995), The Japan Society of Applied Physics, 27p-ZV-13, 1995). However, it takes long time to obtain ultra high vacuum, and it also takes long time to return the vacuum to atmospheric pressure. This causes a problem that one must always pay attention to adhesion of particles during those process steps.
In addition, when the hydrogen annealing was performed within the temperature range of 1200.degree. C. or more by using the aforementioned RTA apparatus, microroughness can only slightly be improved to an insufficient level, and the haze may be even degraded, whilst COP density is greatly reduced. Therefore, the hydrogen annealing condition must further be improved.
The term haze used herein refers an index of surface roughness, and represents periodic undulations having a length of several to several tens nm. This surface roughness can be evaluated quasi-quantitatively as a haze level of the whole wafer surface by scanning the whole surface of wafer with a laser beam, and determining its irregular refraction intensity by means of a particle counter, which mostly utilizes a laser.
To meet the future use of further miniaturized design rule, it is necessary to establish the conditions for heat treatment that can restore the degradation of the haze. In addition, if the haze value is increased, there may also be arisen a problem that LPDs (light point defects) of 0.10 .mu.m or less cannot be measured when LPDs are determined by a particle counter, because the haze acts as background noise.